Guo, Baolong
-
Vol 17, No 4 (2016) - Articles
An Approach to Reduce Soft Error Rate of SRAM-Based FPGA with SEU Effects by Partial Mitigation and PSO
Abstract
Published by Executive Committee, Taiwan Academic Network, Ministry of Education, Taipei, Taiwan, R.O.C
JIT Editorial Office, Office of Library and Information Services, National Dong Hwa University
No. 1, Sec. 2, Da Hsueh Rd., Shoufeng, Hualien 974301, Taiwan, R.O.C.
Tel: +886-3-931-7314 E-mail: jit.editorial@gmail.com