Design of a JPEG Encoder with the Web-Based HW/SW Codesign Automation

Abstract

The intelligent web-based systems had been developed for various applications such as conceptual design, rapid prototyping manufacturing, and supply chain planning. On the other hand, hardward/software (HW/SW) codesign is commonly used methodology for digital-system design. However, no previous work had been carried out in order to develop a web-based HW/SW codesign framework. Design of a JPEG encoder with the web-based HW/SW codesign automation is performed in this work. The JPEG encoder designed by C program language is compiled with MS Visual C++ 6 to verify its correctness at first. The ANSI C design of a JPEG encoder is further transferred into a webbased codesign framework, which utilize web servers, CGI programs (in C or PERL), GCC compiler, SPIM simulator, and Cadence EDA tools. In about seventy working minutes, the respective design of a MIPS-like processor (hardware) in TSMC 0.18um VLSI layout with machine code (software) is going to be automatically accomplished in the web-based codesign framework. The full detailed HW/SW design is capable to be automatically e-mailed return to remote user for further application. In the web-based codesign framework, the MIPS-like processor is designed by using alogrithmic state machine and Verilog hardware description language. In addition, the HW/SW design of a JPEG encoder is verified with using a Xilinx FPGA development board for this study.