The IEEE Conference on Dependable and Secure Computing (DSC) solicits papers, posters, practices, and experiences for presenting innovative research results, problem solutions, and new challenges in the field of dependable and secure computing. The whole spectrum of IT systems and application areas, including hardware design and software systems, with stringent relevant to dependability and security concerns are of interest to DSC. This year, the 2018 IEEE Conference on Dependable and Secure Computing (DSC 2018) will be held in Kaohsiung, Taiwan on 10-13 December, 2018. The aim of DSC 2018 is to provide a leading edge forum to foster interaction between researchers and developers with the network and system security communities, and to give attendees an opportunity to interact with experts in academia, industry, and governments. More information about the conference can be found at its website http://dsc2018.nsysu.edu.tw/.

The main goal of this special issue is to publish outstanding researches from IEEE DSC 2018. We plan to select the papers relevant to dependable and secure computing from the accepted papers based on the reviews (comments and scores) and the presentations during the conferences. Each selected paper must be substantially extended, with at least 40% difference from its conference version.

Topics of interest include but are not limited to:

-Advanced Persistent Threat (APT)

-Network Attack and Defense Techniques

-Botnet and Intrusion Detection

-Cryptographic Methods and Toolkits

-Cyber attacks -Software Vulnerabilities and Security

-Database Security and Privacy

-Embedded Systems and IoT Devices

-Mobile and Cloud Computing Security

-AI and Big Data Analysis for Security

-Malware Mutation

-Deep Learning for Attack and Defense

-Block Chain and Finance Security

-Security Hardware and Circuits

-Authentication and Authorization

-Soft-Error Analysis and Models

-CAD Algorithms and Tools

-Electronic Circuits and Syetms

-Fault-Tolerance and Reliability

-Industrial Design Experiences

-Noise- and Power-Aware Designs

-Stochastic Circuits and Systems

-Temperature-Aware Designs

-Variable-Latency Designs

Instructions for Manuscripts

Each paper, written in English, should be no more than 5000 words, including references and illustrations. More information can be found at https://jit.ndhu.edu.tw/about/submissions#onlineSubmissions. All submitted papers will be reviewed by at least three reviewers and selected based on their originality, significance, relevance, and clarity of presentation. The covering letter should indicate the names of the authors and their affiliations, addresses, faxes, and e-mails.

Important Dates Manuscript

submission deadline: April 01, 2019

Notification of Acceptance/ Rejection/ Revision:May 31, 2019

Final Manuscript Due: June 30, 2019

Tentative Publication Date: First Quarter in 2020

Guest Editors

Prof. Chun-I Fan National Sun Yat-sen University, Taiwan

E-mail:cifan@cse.nsysu.edu.tw

Prof. Chih-Hung Wang National Chia Yi University, Taiwan

E-mail: wangch@mail.ncyu.edu.tw

Prof. Omote Kazumasa University of Tsukuba, Japan

E-mail: omote@risk.tsukuba.ac.jp

Prof. Chunhua Su University of Aizu, Japan

E-mail: chsu@u-aizu.ac.jp

Prof. Kuo-Hui Yeh National Dong Hwa University, Taiwan

E-mail: khyeh@gms.ndhu.edu.tw