數位電視傳輸標準DMB-TH中LDPC碼解碼器解碼參數的選擇與分析

Abstract

本文分析了數位電視傳輸標準DMB-TH中LDPC碼的結構特性，通過模擬比較硬體實現LDPC碼解碼器所涉及的幾個重要參數對解碼性能的影響，給出這些參數的最佳值，並應用於基於FPGA實現的LDPC碼解碼器。結果顯示，對於DMB-TH標準0.4碼率的LDPC碼，硬體實現的解碼性能也與模擬結果相近，可以滿足DMB-TH傳輸要求。In this paper, the characteristics of LDPC codes in digital television broadcasting systems DMB-TH are analyzed. There are several important parameters in hardware implementation of LDPC decoder. By the results of simulations, the effect of these parameters to the performance of decoding is compared. Then the best values of them are shown and used for the LDPC decoder based on FPGA implementation. For the standard of DMBTH with 0.4 code rate, the result shows that the decoding performance of hardware implementation is very close to the simulation performance, and can fulfill the transmission require of DMB-TH.