An Improved Combinational Side-Channel Attack on S-Box in Block Cipher

Abstract

After using side-channel information leaked by the FPGA chip which is embedded with a block cipher algorithm, there is a scheme called improved combinational side-channel attack. This scheme mainly aimed at logical circuits implemented in S-box in background of power consumption attack and we make a level of models by power consumption in combinational logic circuits which is engendered by glitches different from traditional sequential logical circuits which is engendered by flip in the output of register with the Hamming model. In addition, we take advantage of match algorithm in a linear model and in multivariate Gaussian model from template attack to process an important data twice and the key would be recovered. At last, we make a comparison between Hamming model and our model. And prove that this paper improved the attacking efficiency and accuracy and also provided a clue to the security cipher chip from countermeasures.