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FullDOSC: An Implementation of SDIPC for Embedded System

Pasakorn Tongsan,
Korakit Seemakhupt,
Krerk Piromsopa,

Abstract


In this paper, we implement Full-Duplex One Serial Communication (FullDOSC), a platform that uses only one serial interface of processors which aims to alleviate hardware constraints. This property is suitable for limited resource in embedded systems. Based on our work on Software-Defined Inter-Processor Communication for Embedded system [1], we have extended FullDOSC Routing Language (FRL) as modified FRL (mFRL) and implemented on physical hardware. Our device nodes (implemented on STM32F0) use 1,401 bytes of flash memory and 347 bytes of RAM on average. Our router (implemented on Xilinx Zynq SoC with ARM Cortex-A9 processor) uses only 544 LUT. The prototype shows that FullDOSC uses few resources to provide flexible and reusable communication for embedded systems.

Keywords


FPGA; Embedded system; Software-defined; Inter-processor communication; SDIPC

Citation Format:
Pasakorn Tongsan, Korakit Seemakhupt, Krerk Piromsopa, "FullDOSC: An Implementation of SDIPC for Embedded System," Journal of Internet Technology, vol. 18, no. 7 , pp. 1659-1667, Dec. 2017.

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Published by Executive Committee, Taiwan Academic Network, Ministry of Education, Taipei, Taiwan, R.O.C
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