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The Design of High-Speed Hardware UDP/IP Stack Based on FPGA for Large-Scale Sensing Systems

Nianyun Liu,
Zhiqiang Xu,

Abstract


In order to promote the network throughput of embedded devices applied by large-scale sensing systems, we propose a hardware UDP/IP stack based on Field Programmable Gate Array (FPGA). We analyze the features of data transmitting in sensing systems, point out disadvantages in traditional solutions and make comparisons between several hardware UDP/IP stacks proposed in recent years. On the basis of these work, we design this hardware stack which has made significant progress in terms of the integrity of protocols, the design structure and the maximum throughput. In addition, we provide a driver layer and a dedicated application layer and they can form an integral FPGA-PC communication system together with this hardware stack. Therefore, this design can be transplanted or upgraded much easier and wider for practical demands while maintain higher network throughput. Simulations of each module are carried out and the whole synthesis file is tested repeatedly through respective verification experiments. Final results show that the network throughput is faster than those relative designs and approximately 8 times faster than that of software stack tested on the same device.

Keywords


Hardware UDP/IP stack; High Speed; Network Communication; FPGA

Citation Format:
Nianyun Liu, Zhiqiang Xu, "The Design of High-Speed Hardware UDP/IP Stack Based on FPGA for Large-Scale Sensing Systems," Journal of Internet Technology, vol. 18, no. 3 , pp. 579-587, May. 2017.

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Published by Executive Committee, Taiwan Academic Network, Ministry of Education, Taipei, Taiwan, R.O.C
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